1. Industrial Field
The present invention relates to an emulation system used for logic verification, algorithm analysis, etc. by actual machine in the designing stage of an application specific integrated circuit (hereinafter referred to as "ASIC") under development.
2. Prior Art
Hitherto, in the development of ASIC, logic verification using any general purpose substrate and logic verification using a substrate prepared for exclusive use of ASIC have been carried out on an ASIC which is same as the one designed in EWS system. With the recent progress of semiconductor technology, it has been certainly possible to develop a large scale ASIC, but it takes a very long time to prepare such a large scale ASIC by manually applying a required wiring to a substrate. In case of the substrate for exclusive use of ASIC, since there is no versatility, it has been necessary to prepare a substrate every time an ASIC is developed.
To cope with the mentioned disadvantages, an emulation system has been introduced and, at present, logic verification in the development of ASIC may be smoothly carried out by actual machine.
FIG. 19 is a block diagram showing essential parts of a conventional emulation system. In the drawing, reference numerals 1 to 4 indicates FPGA(s) for emulation of field programmable gate array each serving as an integrated circuit of the programmable gate array to carry out logic verification (hereinafter referred to as "emulation FPGA(s)"), and numeral 5 indicates an IC for exclusive use in wiring control using a gate array (hereinafter referred to as "wiring control IC").
Operation of this conventional emulation system is hereinafter described.
Every input/output pin of the emulation FPGA 1 to 4 for carrying out logic verification is connected to the wiring control IC 5. For carrying out logic verification, a signal line is selected from among the input/output pins connected to the wiring control IC 5, then logic verification is carried out in the emulation FPGA 1 to 4, and a signal is outputted through the wiring control IC 5.
As mentioned above, the conventional emulation system of above arrangement is essentially provided with the IC 5 for exclusive use in wiring control, resulting in an emulation system of high cost. There is also another type of emulation system in which wiring control is carried out by utilizing a part of the emulation FPGA(s) 1 to 4. This another type of emulation system, however, has a disadvantage of reducing number of gates for carrying out logic verification due to such wiring control to which a part of emulation FPGA(s) is directed.
A further problemincidental to the conventional emulation system exists in that input signal for carrying out logic verification and output signal outputted after carrying out logic verification are all digital signals, and therefore it is necessary to prepare an analog circuit employing a separate substrate for carrying out logic verification on analog signal.